The present invention relates to a logical regulation circuit for an electronic timepiece for regulating the frequency rate of a high frequency time standard by ON-OFF information of external switches, and more particularly to a logical regulation circuit for an electronic timepiece capable of repeatedly regulating the predetermined frequency rate.
Conventionally, an output from an oscillator has been logically regulated by being divided at a suitable frequency dividing ratio with a variable frequency divider, by way of a method for regulating the rate.
FIG. 1 shows an embodiment of a conventional logical regulation circuit. Numeral 1 is an oscillator, 2 is a variable frequency divider, 3a-3d are switch members SWs 1-4, 4a-4d are n-channel MOS transistors (referred to as n-Trs hereafter), 5a-5d are half-latches, 6 is a clock signal CL1 for turning on the n-Trs 4a-4d, and 7 is a clock signal CL2 for the half-latches 5a-5d. The relationship between the CL1 and CL2 signals is shown in a timing chart of FIG. 2 from which it can be seen that the half-latches 5a-5d read and memorize 1 or 0 by the ON or OFF operation of the SWs 1-4 of 3a-3d. The variable frequency divider 2 divides the high frequency output signal from the oscillator 1 at the frequency dividing ratio set by the memory information of the half-latches 5a-5d to provide a unit time signal, and regulates at the selected rate value, e.g., as shown in FIG. 3. The frequency rate values in FIG. 3 are set on the assumption that the rate is 0 when the output frequency of the oscillator 1 is not logically regulated. The symbols 1, 0 of the SWs 1-4 in FIG. 3 respectively indicate that the switches 3a-3d are ON or OFF in FIG. 1. (A detailed description of the variable frequency divider 2 is omitted since it is a prior art device of known construction). The conventional logical regulation circuit, however, has the following drawbacks:
(1) When the SWs 1-4 are constructed by cutting off or not cutting off the wiring on the circuit board, the rate cannot be regulated again once it is set. This is disadvantageous on the assembly process or for service after sale. PA1 (2) When the SWs 1-4 are constructed by mechanical traveling contacts, regulation of the rate is possible. To obtain 16 combinations of SWs 1-4 as shown in FIG. 3, however, the construction becomes extremely complicated, which results in high cost. PA1 (3) When the SWs 1 and 2 are constructed by turning off or not the wiring on the circuit board and the SWs 3 and 4 are constructed by mechanical traveling contacts, for instance, the construction of the mechanical traveling contacts is simplified. However, the regulation of the rate becomes unidirectional by some ON-OFF combination of the SWs 1-4.